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  1 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs ws512k32v-xxx march 2006 rev. 12 512kx32 sram 3.3v multichip package ? low power cmos ? ttl compatible inputs and outputs ? fully static operation: ? no clock or refresh required. ? three state output. ? built-in decoupling caps and multiple ground pins for low noise operation ? weight ws512k32v-xg2ux - 8 grams typical ws512k32nv-xh1x - 13 grams typical * this product is subject to change without notice. features ? access times of 15, 17, 20ns ? low voltage operation ? packaging ? 66-pin, pga type, 1.075 inch square, hermetic ceramic hip (package 400) ? 68 lead, 22.4mm (0.880 inch) cqfp, (g2u), 3.56mm (0.140"), (package 510) ? organized as 512kx32; user con gurable as 2x512kx16 or 4x512kx8 ? commercial, industrial and military temperature ranges ? low voltage operation: ? 3.3v 10% power supply pin configuration for ws512k32nv-xh1x pin description top view block diagram i/o 8 i/o 9 i/o 10 a 13 a 14 a 15 a 16 a 17 i/o 0 i/o 1 i/o 2 we 2 # cs 2 # gnd i/o 11 a 10 a 11 a 12 v cc cs 1 # nc i/o 3 i/o 15 i/o 14 i/o 13 i/o 12 oe# a 18 we 1 # i/o 7 i/o 6 i/o 5 i/o 4 i/o 24 i/o 25 i/o 26 a 6 a 7 nc a 8 a 9 i/o 16 i/o 17 i/o 18 v cc cs 4 # we 4 # i/o 27 a 3 a 4 a 5 we 3 # cs 3 # gnd i/o 19 i/o 31 i/o 30 i/o 29 i/o 28 a 0 a 1 a 2 i/o 23 i/o 22 i/o 21 i/o 20 11 22 33 44 55 66 1 12 23 34 45 56 we 1 #cs 1 #cs 2 #cs 3 #cs 4 # we 4 # we 3 # we 2 # 512k x 8 512k x 8 512k x 8 512k x 8 oe# a 0-18 i/o 0-7 i/o 24-31 i/o 16-23 i/o 8-15 8888 i/o 0-31 data inputs/outputs a 0-18 address inputs we 1-4 # write enables cs 1-4 # chip selects oe# output enable v cc power supply gnd ground nc not connected
2 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs ws512k32v-xxx march 2006 rev. 12 pin description block diagram top view pin configuration for ws512k32v-xg2ux i/o 0 i/o 1 i/o 2 i/o 3 i/o 4 i/o 5 i/o 6 i/o 7 gnd i/o 8 i/o 9 i/o 10 i/o 11 i/o 12 i/o 13 i/o 14 i/o 15 i/o 16 i/o 17 i/o 18 i/o 19 i/o 20 i/o 21 i/o 22 i/o 23 gnd i/o 24 i/o 25 i/o 26 i/o 27 i/o 28 i/o 29 i/o 30 i/o 31 v cc a 11 a 12 a 13 a 14 a 15 a 16 cs 1 # oe# cs 2 # a 17 we 2 # we 3 # we 4 # a 18 nc nc nc a 0 a 1 a 2 a 3 a 4 a 5 cs 3 # gnd cs 4 # we 1 # a 6 a 7 a 8 a 9 a 10 v cc 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 we 1 #cs 1 #cs 2 #cs 3 #cs 4 # we 4 # we 3 # we 2 # 512k x 8 512k x 8 512k x 8 512k x 8 oe# a 0-18 i/o 0-7 i/o 24-31 i/o 16-23 i/o 8-15 8888 i/o 0-31 data inputs/outputs a 0-18 address inputs we 1-4 # write enables cs 1-4 # chip selects oe# output enable v cc power supply gnd ground nc not connected
3 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs ws512k32v-xxx march 2006 rev. 12 note: dc test conditions: v ih = v cc -0.3v, v il = 0.3v. contact factory for low power option. parameter symbol min max unit operating temperature t a -55 +125 c storage temperature t stg -65 +150 c signal voltage relative to gnd v g -0.5 4.6 v junction temperature t j 150 c supply voltage v cc -0.5 4.6 v truth table absolute maximum ratings recommended operating conditions parameter symbol min max unit supply voltage v cc 3.0 3.6 v input high voltage v ih 2.2 v cc + 0.3 v input low voltage v il -0.3 +0.8 v cs oe we mode data i/o power h x x standby high z standby l l h read data out active l x l write data in active l h h out disable high z active capacitance t a = +25c parameter symbol conditions max unit oe# capacitance c oe v in = 0v, f = 1.0 mhz 50 pf we 1-4 # capacitance hip (pga) c we v in = 0v, f = 1.0 mhz 20 pf cqfp g2u 20 cs 1-4 # capacitance c cs v in = 0v, f = 1.0 mhz 20 pf data# i/o capacitance c i/o v i/o = 0v, f = 1.0 mhz 20 pf address input capacitance c ad v in = 0v, f = 1.0 mhz 50 pf this parameter is guaranteed by design but not tested. dc characteristics v cc = 3.3v 0.3v, v ss = 0v, -55c t a +125c parameter sym conditions units min max input leakage current i li v in = gnd to v cc 10 a output leakage current i lo cs# = v ih , oe# = v ih , v out = gnd to v cc 10 a operating supply current i cc x 32 cs# = v il , oe# = v ih , f = 5mhz, v cc = 3.6 400 ma standby current i sb cs# = v ih , oe# = v ih , f = 5mhz, v cc = 3.6 200 ma output low voltage v ol i ol = 4.0ma 0.4 v output high voltage v oh i oh = -4.0ma 2.4 v
4 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs ws512k32v-xxx march 2006 rev. 12 current source current source i ol i oh c eff = 50 pf d.u.t. v z 1.5v (bipolar supply) ac characteristics v cc = 3.3v, gnd = 0v, -55c t a +125c parameter write cycle symbol -15 -17 -20 units min max min max min max write cycle time t wc 15 17 20 ns chip select to end of write t cw 12 12 14 ns address valid to end of write t aw 12 12 14 ns data valid to end of write t dw 9 9 10 ns write pulse width t wp 12 14 14 ns address setup time t as 000ns address hold time t ah 000ns output active from end of write t ow 1 233ns write enable to output in high z t whz 1 889ns data hold time t dh 000ns parameter read cycle symbol -15 -17 -20 units min max min max min max read cycle time t rc 15 17 20 ns address access time t aa 15 17 20 ns output hold from address change t oh 000ns chip select access time t acs 15 17 20 ns output enable to output valid t oe 8 8 10 ns chip select to output in low z t clz 1 111ns output enable to output in low z t olz 1 000ns chip disable to output in high z t chz 1 8 8 10 ns output disable to output in high z t ohz 1 8 8 10 ns 1. this parameter is guaranteed by design but not tested. ac characteristics v cc = 3.3v, gnd = 0v, -55c t a +125c 1. this parameter is guaranteed by design but not tested. ac test circuit notes: v z is programmable from -2v to +7v. i ol & i oh programmable from 0 to 16ma. tester impedance z 0 = 75 . v z is typically the midpoint of v oh and v ol . i ol & i oh are adjusted to simulate a typical resistive load circuit. ate tester includes jig capacitance. ac test conditions parameter typ unit input pulse levels v il = 0, v ih = 2.5 v input rise and fall 5 ns input and output reference level 1.5 v output timing reference level 1.5 v
5 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs ws512k32v-xxx march 2006 rev. 12 ws32k32-xhx address data i/o read cycle 1 (cs# = oe# = v il , we# = v ih ) t aa t oh t rc data valid previous data valid address data i/o read cycle 2 (we# = v ih ) t aa t acs t oe t clz t olz t ohz t rc data valid high impedance cs# oe# t chz address data i/o write cycle 2, cs# controlled t aw t as t cw t ah t wp t dh t dw t wc cs# we# data valid timing waveform - read cycle write cycle - cs# controlled address data i/o write cycle 1, we# controlled t aw t cw t ah t wp t dw t whz t as t ow t dh t wc data valid cs# we# write cycle - we# controlled
6 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs ws512k32v-xxx march 2006 rev. 12 27.3 (1.075) 0.25 (0.010) sq pin 1 identifier square pad on bottom 25.4 (1.0) typ 0.46 (0.018) 0.05 (0.002) dia 1.42 (0.056) 0.13 (0.005) 0.76 (0.030) 0.13 (0.005) 1.27 (0.050) typ dia 25.4 (1.0) typ 15.24 (0.600) typ 2.54 (0.100) typ 3.81 (0.150) 0.13 (0.005) 4.60 (0.181) max package 510: 68 lead, low profile ceramic quad flat pack, cqfp (g2u) all linear dimensions are millimeters and parenthetically in inches 0.38 (0.015) 0.05 (0.002) 0.25 (0.010) 0.10 (0.002) 25.15 (0.990) 0.25 (0.010) sq 1.27 (0.050) typ 24.0 (0.946) 0.25 (0.010) 22.36 (0.880) 0.25 (0.010) sq 20.3 (0.800) ref 23.87 (0.940) ref 1.01 (0.040) 0.13 (0.005) 0.25 (0.010) ref 1 / 7 r 0.25 (0.010) detail a see detail "a" pin 1 0.53 (0.021) 0.18 (0.007) 3.51 (0.140) max package 400: 66 pin, pga type, ceramic hex-in-line package, hip (h1) all linear dimensions are millimeters and parenthetically in inches
7 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs ws512k32v-xxx march 2006 rev. 12 ordering information white electronic designs corp. sram organization, 512kx32 user con gurable as 2x512kx16 or 4x512kx8 improvement mark: n = no connect at pin 21 and 39 in hip for upgrades (h1 only) low voltage supply 3.3v 10% access time (ns) package type: h1 = 1.075" sq. ceramic hex in line package, hip (package 400) g2u = 22.4mm ceramic quad flat pack, cqfp (package 510) device grade: m = military -55c to +125c i = industrial -40c to +85c c = commercial 0c to +70c lead finish: blank = gold plated leads a = solder dip leads w s 512k 32 x v - xxx x x x


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